Noise-figure measuring circuit

ABSTRACT

The invention relates to a noise-figure measuring circuit for the determination of the receiver noise in an operational radar receiver. A comparator is alternatively supplied with the receiver noise and the sum of the receiver noise and the noise signals, which are obtained from a noise source connected to the input of the radar receiver, each pulse repetition period. This comparator converts the noise signals exceeding a certain threshold into standardised noise pulses. The noise-figure measuring circuit comprises two counters which are supplied with the noise pulses derived from the receiver noise and also with the noise pulses derived from the sum of the receiver noise and the noise signals from the noise source. One of the two counters functions as reference counter. If this counter has reached a certain count position, the counters are both blocked, and the ratio of the count positions determines the ratio between the power of the receiver noise and the power of the noise signals from the noise source.

United States Patent [191 Gellekink Feb. 26, 1974 NOISE-FIGURE MEASURINGCIRCUIT Primary Examiner-Malcolm F. Hubler [75] Inventor: BernardGellekink, Hengelo, Attorney Agent or Flrmprank Tnfan Netherlands [73]Assignee: N.V. Hollandse Signaalapparaten, [57] ABSTRACT Hengelo,Netherlands The invention relates to a noise-figure measuring cir- [22]Filed Apr 19 1972 cuit for the determination of the receiver noise in anoperational radar receiver. A comparator is alternatively supplied withthe receiver noise and the sum of the receiver noise and the noisesignals, which are obtained from a noise source connected to the inputof the radar receiver, each pulse repetition period. This comparatorconverts the noise signals exceeding a certain threshold intostandardised noise pulses. The noise-figure measuring circuit comprisestwo counters which are supplied with the noise pulses derived from thereceiver noise and also with the noise pulses derived from the sum ofthe receiver noise and the noise signals from the noise source. One ofthe two counters functions as reference counter. If this counter hasreached a certain count position, the counters are both blocked, and theratio of the count positions determines the ratio between the power ofthe receiver noise and the power of the noise signals from the noisesource.

5 Claims, 5 Drawing Figures [30] Foreign Application Priority Data Apr.20, l97l Netherlands 7105272 [52] US. Cl. 343/17.7, 325/363 [51] Int. ClG0ls 7/40, H04b 15/00 [58] Field of Search 343/l7.7; 325/363 [56]References Cited UNITED STATES PATENTS 3,062,955 1 1/l962 Hovda et al.343/l7.7 X 3,072.845 l/l963 Bruck 325/363 X 3,302,1l6 l/l967 Free325/363 3,510,768 5/1970 Petersen 343/l7.7 X

TRANSMITTER 2 1 N0 PULSE GEN We ANTENNA 5 4 ATTENUATOR l5 NOISE souRcEijn COMPARATOR DUPLEXEB H NOISETFIGURE MEA5URlN1C2 CIRC.

DECODING -AND INDICATING SYSTEM 1a THRESHOLD CONTROL CIRC.

g l 22 23 2o 17 1 FIRSTl 1 OUNTER GATE RESET cmcuns TIME CONTROL 1 25(SECOND) l 21 COUNTER NOISE-FIGURE MEASURING CIRCUIT The inventionrelates to a noise-figure measuring circuit for the determination of thereceiver noise in an operational radar receiver.

In Skolnik, M.l., Introduction to Radar Systems, McGraw Hill 1962, page365, the desirability has already been expressed that an operationalradar receiver should have some means to monitor automatically andcontinuously the noise figure and, hence, the sensitivity of thereceiver. This would have to be accomplished by inserting a test signaleither an RF pulse or a gated noise signal into the receiver during thetime (dead time) when no echo pulses can be received, and by measuringthe energy present at the receiver output after insertion of the testsignal and also in the absence of this signal. This measurement shouldhave to be carried out in such a way that the operating personnel aremade aware by direct indication of any excessive rise in noise figure ordegradation of the receiver sensitivity.

It is the object of the invention to provide a noisefigure measuringcircuit that enables, in accordance with the above-mentioneddesirabilities, receiver-noise monitoring using a simple and accuratemethod.

According to the invention, the noise-figure measuring circuitcomprises, for this purpose, a comparator which is connected to theradar receiver and which is alternately supplied with the receiver noiseand with the sum of the receiver noise and the noise signals, which areobtained from the high-frequency noise source connected to the radarreceiver input, each pulse repetition period and within a time intervalin which no echo pulses can be received; said comparator converts thesupplied noise signals, which exceed a certain threshold value, intostandardised noise pulses. The noise-figure measuring circuit isprovided with two counters coupled to the comparator; the first counterwhich is supplied with the noise pulses derived from the receiver noise,and the second counter is fed with the noise pulses derived from the sumof the receiver noise and the noise signals from the noise source, oneof the two counters functions as a reference counter which upon theattainment of a predetermined count position becomes blocked and alsoblocks the other counter the ratio of the count positions determines theratio between the power of the receiver noise and the power of the noisesignals originating from the noise source; furthermore, the othercounter not functioning as reference is connected to a decoding andindication system which is provided with a calibrated scale so that thecount position of the other counter records the noise present in theradar receiver on said scale. I

The invention will now be further explained in conjunction with theaccompanying drawings, in which:

FIG. 1 shows a block diagram of the noise-figure measuring circuitaccording to the invention and a radar system to which said measuringcircuit may be applied;

FIGS. 2 and 3 show a number of diagrams for an explanation of theoperation of said measuring circuit; and

FIGS. 4 and 5 depict some detail diagrams illustrating certain parts ofthe noise-figure measuring circuit shown in a block diagram in FIG. 1.

FIG. 1 shows a pulse radar apparatus which is provided with anoise-figure measuring circuit and which consists of a synchronisationpulse generator 1, a transmitter 2, and a receiver 3. The transmitterand receiver are coupled to an antenna 5 via a duplexer 4. The receiver3 comprises a mixer 6, a local oscillator 7, an intermediate-frequencyamplifier 9 provided with an AGC (Automatic Gain Control) circuit 8, anda detector/video amplifier 10. With the aid of the abovementioned unitsthe received RF signals are converted into intermediate-frequencysignals, amplified and detected in the known way. The video signals soobtained may, for example, be displayed on a PBI.

In order to be able to register the noise power of the receiverautomatically and continuously in such a pulse radar apparatus, theoutput of the receiver 3 is connected to a noise-figure measuringcircuit 11. This measuring circuit contains a comparator 12, connectedto the output of the receiver 3. The comparator 12 is suppliedalternately with the receiver noise and with the sum of the receivernoise and the noise signals, which are obtained from a noise source 13connected to the input of the radar receiver 3, driving each pulserepetition period and within a time interval in which no echo pulses canbe received. Hereinafter, the sum of the receiver noise and the noisesignals from the noise source will be designated by sum noise. The noisesource 13 is formed by a high-frequency, white-noise generator 14 and anadjustable attenuator 15. The noise energy produced by the noisegenerator can be fed to the receiver 3 via the waveguide coupling 16.

FIG. 2A illustrates a time diagram indicating the times at which thesync ronization pulse generator 1 supplies the sync pulses The timebetween two successive sync pulses (pulse repetition time) is such that,after the elapse of a time within which the echo pulses can be received,a certain other time (dead time) will elapse before another sync pulsewill be supplied. FIG. 28 indicates the intervals t,, which are withinthe dead time r and during which the noise source 13 is switched on, andalso the intervals 1' which are within t, and during which the sum noisep, is being processed in the noise-figure measuring circuit. FIG. 2Cindicates the alternate intervals t which are also within the dead timer and during which nothing but the receiver noise N is being processedin the noise-figure measuring circuit; also the duration of thesealternate time intervals I is 1' A signal supplied by a time controlunit 17 and fed via the line 18 switches on the noise source 13 everyalternate pulse repetition time during the time interval t,. The correctswitching times are determined by the time control unit according tosync pulses fed to this unit 17 from the sync pulse generator 1 via theline 19.

The receiver noise No and the sum noise P0 are alternately processed inthe noise-figure measuring circuit during a time 1' If the detector usedin the receiver 3 is employed as a phase-sensitive detector, theprobability that the value of a detected noise sample lies between thevoltage values x and x +d.x can be indicated by the relationship:

d P(x) 1/0" m exp Ito/20 ab:

and the probability that a detected noise sample exceeds a certainthreshold E may be given by In these relationships it has been assumedthat the mean noise level at the receiver output be zero; thedistribution in the above Gaussian relationships is indicated byNevertheless, if the detector in the radar receiver provides a dc.voltage component of the value p. then the noise is distributed as N(o',,u). The threshold value should then be increased by the same value tThe probability that a detected sum noise sample and a detected receivernoise sample exceed a threshold value E,, can therefore be expressed inan analogue way by the relationships:

The comparator 12, of which the comparator voltage corresponds to thethreshold E, in the above relationships, converts the noise signalsexceeding this threshold into standardised noise pulses. Thenoise-figure measuring circuit further comprises a first counter coupledto the comparator 12. The first counter 20 is fed with the standardisednoise pulses derived from the receiver noise No, and a second counter 21also coupled to the comparator 12. The second counter 21 is fed with thestandardised noise pulses derived from the sum noise Po. One of the twocounters functions as reference counter so that, in case this referencecounter has reached a predetermined count position at which the twocounters have been blocked, the ratio of the count positions determinesthe ratio between the power of the receiver noise and the power of thenoise signals originating from the noise source 13. In this example thesecond counter 21 functions as a reference counter. There are two gatecircuits 22 and 23 between the comparator 12 and the counter 20 andanother two gate circuits 24 and 25 between the comparator and thesecond counter 21. The noise pulses derived from the receiver noise Npass the gate circuit 22 every alternate pulse repetition period duringa time interval 1 The noise pulses derived from the sum noise P pass thegate circuit 24 every other pulse repetition period also during a timeinterval 1' The two gate circuits 22 and 24 are controlled by controlsignals supplied by the time control unit 17. The gate circuits 23 and25 are disabled when the second or reference counter 21 has reached apredetermined count position and they will not be opened until the twocounters are reset.

The noise pulses passed through the gate circuit 24 are also fed to athreshold control circuit 26 connected to one input of comparator 12.This threshold control circuit sets the threshold voltage E, supplied tothe comparator to such a value that a fixed mean number of noise pulsesare fed to the reference counter 2 during the time 1' Theabove-mentioned relationship, which expresses the probability that adetected sum noise sample exceeds the value E, or the probability that adetected sum noise sample is converted into a noise pulse to be fed tothe reference counter 21, may be rewritten as:

Since the value E,'will be so selected that a specific mean number (n)of noise pulses is fed to the reference 21 counter during the said timeinterval 1' P(Po) will be constant, or

Et/o'p a At the moment the two counters are blocked the mean countposition of the first counter 20 is inversely proportional to the meantime between two successive receiver noise samples exceeding thethreshold. The two counters are disabled when the second or referencecounter 21 has reached a predetermined count position. Obviously, alsothis count position is inversely proportional to the mean time betweentwo successive sum noise samples exceeding the threshold. Since the meantime between two successive noise samples exceeding the threshold isalso inversely proportional to the probability that a noise sampleexceeds this threshold, the ratio between the mean count position of thecounter 20 (to be denoted by No t) and the position of the counter 21(to be denoted by Po-t) is equal to the ratio between P(No) and P(Po),or

The above shows that N0-t is proportional to P(No); the proportionalityconstant is determined by Po-t and P(Po). If the ratio between theeffective sum noise voltage U'p and the effective receiver noise voltage(T is transformed to a ratio between efiective sum noise energy Po(E)and effective receiver noise energy No(E), then:

where C is the above-mentioned proportionality constant and k aP0(E)/N0(E). The effective sum noise energy is the sum of the effectivereceiver noise energy No(E) and the effective noise source energy So(E).Hence, the mean count position of the counter 20 is a measure for theratio between the energy from the noise source and the receiver noiseenergy.

The counter 20 is connected to a decoding and indication system 27 whichis provided with a calibrated scale so that the position of the counter20 records the noise present in the radar receiver on this scale.

It should be noted that the end count position of the 5 referencecounter 21 must be sufficiently large, and therefore the total counttime required must be sufficiently long, in order that the distributionin the contents of the counter 20 is below a predetermined value.

This value must be so small that the read position, in-

FIG. 4 shows a part of the noise-figure measuring circuit in detail.Here, the counter 20 is composed of four binary-coded decimal decadecounters 28, 29, 30 and 31, the counter 21 of three four-bit seriescounters 32, 33 and 34, followed by two .I-K flip-flop circuits 35 and36. The gate circuits 23 and 25 are each formed by a 25 J-K flip-flopcircuit. As long as the counter 21 has not reached its maximum countposition, the two gate circuits 23 and 25 are kept in the open statewith the aid of a signal supplied via the line 37 by the flip-flopcircuit 36. At the moment the counter 21 has reached its maximum countposition, the flip-flop circuit 36 switches over and the voltage on theline 37 changes in such a way that the two gate circuits 23 and 25 aredis abled.

The decoding and indication system 27 connected to the counter 20comprises two binary decimal decoders 38 and 39 connected to counters 30and 31, a decoder 40 connected to the outputs of both binary decoders 38and 39, and eight .l-K flip-flop circuits 41-48 connected to the latterdecoder 40. The outputs of these flip-flop circuits are connected tolamps which will light if the respective flip-flop outputs are at thebinaryyoltage value of lf The lamp panel is provided with a calibratedscale.

The binary-coded decimal decade counters 30 and 45 31 count the hundredsand the thousands respectively, which information is processed by thedecoder 40 in such a way that the count range is divided into intervalsand each of the flip-flop circuits 41-48 connected to the decoder 40corresponds to one of these intervals. When a lamp connected to therespective flip-flop lights up, this thus implies that the position ofthe counter 20 lies within a certain interval. A signal provided by thedecoder 40 cannot change the state of the corresponding flip-flopcircuit until a suitable signal is applied via the line 49. This signaloriginates from the time control unit 17.

In the case a noise-figure measurement has occurred and the result hasbeen read on the lamp panel, the gates 23 and 25 can again be opened,the counters 20 and 21 and also the flip-flop circuits 35, 36, 4148 canbe reset and a following measurement started.

FIG. 5 indicates the threshold control circuit 26 in detail. This figurealso shows the two gates 22 and 24 which are used as NAND gates. Theoutput of the NAND gate 24 is fed to an inverter of the thresholdcontrol circuit. The threshold control circuit also includes a shiftregister 51 connected to the output of inverter 50, the inverters 52-56each connected to an assigned output of the shift register 51, the adder57 coupled to respective outputs of inverters 52-56 and an integrator 58connected to the adder 57. The standardised noise pulses derived fromthe sum noise P0 are fed to the shift register 51 during a time interval1' and in such a way that, if one noise pulse is received in the time1', only the shift register output 59 becomes low, that is, the output59 will be 0, expressed in binary form. This is accomplished by theaction of the applied noise pulse which is used as clock pulse in orderto write the binary value 0, supplied via the line 60, into the shiftregister. Prior to this, this register should be prgset lf a secondnoise pulse is received within the time T, the 0 will be shifted oneplace and two shiftregister outputs 59 and 61 will .be at O. In theapplied design, a maximum of five noise pulses can be written in theregister during the time 1. However, this raises no objections at all,since the threshold control circuit in the design in question has beenset to an average registration of two noise pulses per time interval 1.The voltages at the shift register outputs are then in inverters 52-56,added in adder 57 and fed to the integrator 58. The integrator has beenso set that, if the point 62 is subjected to a voltage corresponding totwo received noise pulses, i.e. approximately 5V in the design inquestion, the output voltage of the integrator remains constant, andhence no control-voltage correction will be performed. On the otherhand, if the number of noise pulses received is greater than two, thethreshold voltage E, should be increased; here, the output voltagedeviation of the summing amplifier with respect to the 5V is a measurefor the correction current for the integrator.

The description is based on a phase-sensitive detector with a Gaussiandistribution of the noise present at the input of the noise-figuremeasuring circuit. However, also other detectors may be used in theradar receiver. For example, if a linear detector is used, theprobability that the value of a detected noise sample lies between x andx dx, according to the Rayleigh distribution, is represented by 2 P(No)=exp 2;

0 Similar to the case in which a phase-sensitive detector was used, alsoin this case it can be derived that the means position of the counter 20can be expressed by same noise-figure measuring circuit can be appliedas in the case where the radar receiver comprises a phasesensitivedetector; however, the lamp panel must be provided with a differentscale. The noise-figure measuring circuit is therefore independent ofthe applied detector and thus also independent of the type of pulseradar apparatus in which it is used.

In the design in question the noise-figure measuring circuit isconnected to the detector/video amplifier. The application of themeasuring circuit at intermediate-frequency level will still bemaintained; the difficulty in the latter case is, however, that thecomparator must remain operational at a considerably higher rate.

It should be noted that it is immaterial which counter or 21 is used asreference counter. As it has been explained, the sum noise and thereceiver noise are supplied to the noise-figure measuring circuitalternately. Since the total count time is sufficient and, consequently,also the number of times that the sum noise and the receiver noise areprocessed during a time "r, it is also sufficient, for example, toprocess the sum noise in five successive pulse repetition periods and,after this, the receiver noise in an equal number of times. In thelatter case it should be ensured that the intermediate-frequencyamplification in the radar receiver remains sufficiently constant for atleast ten successive periods.

What we claim is:

l. A circuit for measuring the receiver noise present in a receiver ofapulse radar, comprising a noise source connected to the input of saidreceiver; a comparator connected to the output of the receiver, meansfor supplying the receiver noise to the comparator for a time intervalwithin one pulse repetition period during which no echo pulses arereceived, and alternately, for supplying the comparator during a similartime interval within a subsequent pulse repetition period, with the sumof the receiver noise and the noise signals from said noise source;means for applying a threshold level to said comparator, said comparatorconverting the supplied noise amplitudes which exceed said thresholdlevel, into standardized noise pulses; a first counter coupled to saidcomparator for counting the noise pulses derived from the receivernoise; a second counter coupled to said comparator for counting thenoise pulses derived from the sum of the receiver noise and the noisesignals; and means for blocking both counters when one counter hasattained a predetermined count position whereby the count position ofthe other counter is indicative of the receiver noise.

2. A circuit according to claim 1 further including decoding andindicating means coupled to said other counter to convert its countposition into a calibrated indication of the noise figure.

3. A circuit as claimed in claim 1, wherein a first gate circuit isprovided between the comparator and the first counter and a second gatecircuit between the comparator and the second counter and wherein saidmeans for supplying includes a time control unit operable for switchingthe noise source into operation every alternate pulse repetition periodduring the time interval when no echo pulses can be received, andsimultaneously for closing the first gate circuit and opening the secondgate circuit for a count time which lies within the time interval whenthe noise source is operational, and, respectively, for opening thefirst gate circuit and and closing the second gate circuit every otherpulse repetition period for a duration corresponding to said count time.

4. A circuit as claimed in claim 3, further including a third gatecircuit and a fourth gate circuit inserted between the first and secondgate circuits and the first and second counters, respectively, wherebyafter the other counter has reached a predetermined count position, thethird and fourth gate circuits are closed, and means for resetting thetwo counters and opening said third and fourth gate circuits.

5. A circuit as claimed in claim 4, wherein said means for applying athreshold level includes a threshold control unit controlled by thenoise pulses which have passed the second gate circuit, and operable toset the threshold voltage applied to the comparator in such a way that afixed mean number of noise pulses are fed to the other counter eachcount time.

1. A circuit for measuring the receiver noise present in a receiver of apulse radar, comprising a noise source connected to the input of saidreceiver; a comparator connected to the output of the receiver, meansfor supplying the receiver noise to the comparator for a time intervalwithin one pulse repetition period during which no echo pulses arereceived, and alternately, for supplying the comparator during a similartime interval within a subsequent pulse repetition period, with the sumof the receiver noise and the noise signals from said noise source;means for applying a threshold level to said comparator, said comparatorconverting the supplied noise amplitudes which exceed said thresholdlevel, into standardized noise pulses; a first counter coupled to saidcomparator for counting the noise pulses derived from the receivernoise; a second counter coupled to said comparator for counting thenoise pulses derived from the sum of the receiver noise and the noisesignals; and means for blocking both counters when one counter hasattained a predetermined count position whereby the count position ofthe other counter is indicative of the receiver noise.
 2. A circuitaccording to claim 1 further including decoding and indicating meanscoupled to said other counter to convert its count position into acalibrated indication of the noise figure.
 3. A circuit as claimed inclaim 1, wherein a first gate circuit is provided between the comparatorand the first counter and a second gate circuit between the comparatorand the second counter and wherein said means for supplying includes atime control unit operable for switching the noise source into operationevery alternate pulse repetition period during the time interval when noecho pulses can be received, and simultaneously for closing the firstgate circuit and opening the second gate circuit for a count time whichlies within the time interval when the noise source is operational, and,respectively, for opening the first gate circuit and and closing thesecond gate circuit every othEr pulse repetition period for a durationcorresponding to said count time.
 4. A circuit as claimed in claim 3,further including a third gate circuit and a fourth gate circuitinserted between the first and second gate circuits and the first andsecond counters, respectively, whereby after the other counter hasreached a predetermined count position, the third and fourth gatecircuits are closed, and means for resetting the two counters andopening said third and fourth gate circuits.
 5. A circuit as claimed inclaim 4, wherein said means for applying a threshold level includes athreshold control unit controlled by the noise pulses which have passedthe second gate circuit, and operable to set the threshold voltageapplied to the comparator in such a way that a fixed mean number ofnoise pulses are fed to the other counter each count time.